.\"
.\" Copyright (c) 2001-2003
.\"	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
.\" 	All rights reserved.
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.\" modification, are permitted provided that the following conditions
.\" are met:
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" Author: Hartmut Brandt <harti@FreeBSD.org>
.\"
.\" $FreeBSD: head/share/man/man4/hatm.4 267938 2014-06-26 21:46:14Z bapt $
.\"
.\" hatm(4) man page
.\"
.Dd May 15, 2003
.Dt HATM 4
.Os
.Sh NAME
.Nm hatm
.Nd "device driver for Fore/Marconi HE155 and HE622 ATM interfaces"
.Sh SYNOPSIS
.Cd device hatm
.Cd device utopia
.Cd device atm
.Pp
.Cd options NATM
.Sh DESCRIPTION
The
.Nm
device driver supports the FORE (now Marconi) HE155 and HE622 ATM interface
cards.
The driver interfaces with the
.Xr natm 4
framework,
.Xr netgraph 4
and the HARP ATM stack.
It provides only PVC services.
Signalling, ATMARP, ILMI and other
higher layer protocols are implemented using
.Xr netgraph 4
or HARP.
.Pp
For configuring the card for IP see
.Xr natmip 4 .
.Pp
The following sysctls are recognized by the driver additionally to those
handled by
.Xr utopia 4 :
.Bl -tag -width indent
.It Va hw.atm.hatm.natm_traffic
This is the traffic type to be used for NATM pvc connections.
The type of
this variable is integer and it must have one of the values 0 (UBR) or 1 (CBR).
.It Va hw.atm.hatm.natm_pcr
This is the peak cell rate to be used for NATM CBR connections.
.It Va hw.atm.hatm Ns Ar N Ns Va .stats
Contains an array of
.Vt uint32_t
with device specific statistics.
.It Va hw.atm.hatm Ns Ar N Ns Va .istats
Contains an array of
.Vt uint32_t
with internal driver statistics.
.It Va hw.atm.hatm Ns Ar N Ns Va .debug
.Bf Em
(Only if debugging enabled.)
.Ef
These are the debugging flags.
See
.Pa src/sys/dev/hatm/if_hatmvar.h
for the possible flags.
.It Va hw.atm.hatm Ns Ar N Ns Va .tsr
.Bf Em
(Only if debugging enabled.)
.Ef
This is an array containing all transmission status registers.
For each of the
4096 possible VCCs there are 15 32-bit registers.
.It Va hw.atm.hatm Ns Ar N Ns Va .tpd
.Bf Em
(Only if debugging enabled.)
.Ef
This is an array containing all on card current transmission packet descriptors.
For each of the 4096 possible VCCs there are 16 32-bit registers.
.It Va hw.atm.hatm Ns Ar N Ns Va .mbox
.Bf Em
(Only if debugging enabled.)
.Ef
This is an array containing the mbox registers.
.It Va hw.atm.hatm Ns Ar N Ns Va .cm
.Bf Em
(Only if debugging enabled.)
.Ef
This is an array containing all connection memory registers.
The first 32-bit integer of this array is the ABR base address.
.It Va hw.atm.hatm Ns Ar N Ns Va .heregs
.Bf Em
(Only if debugging enabled.)
.Ef
This is an array containing all card registers including SUNI and the FLASH ROM.
.It Va hw.atm.hatm Ns Ar N Ns Va .lbmem
.Bf Em
(Only if debugging enabled.)
.Ef
Returns the contents of the local memory.
.El
.Pp
The driver supports the media options
.Cm sdh , noscramb
and
.Cm unassigned
(see
.Xr utopia 4 ) .
.Sh ENVIRONMENT
When attaching to a device the driver checks the kernel environment
(see
.Xr kenv 1 )
to see if the default queues sizes should be overwritten or not.
The
following variables are checked and interpreted as unsigned integer
values (in either radix):
.Bl -tag -width indent
.It Va hw.hatm Ns Ar N Ns Va .rbps0_size
Size of the small receive buffer pool 0.
This pool is used for all
except raw AAL connections.
The pool size must be a power of two between
4 and 8192 inclusive.
When attaching the driver allocates this number
of mbufs.
.It Va hw.hatm Ns Ar N Ns Va .rbps0_thresh
Interrupt threshold for small receive buffer pool 0.
When the number of free
buffers in the pool falls below this threshold it generates an interrupt
so that the driver can refill the pool.
.It Va hw.hatm Ns Ar N Ns Va .rbpl0_thresh
Size of the large receive buffer pool 0.
This pool is used for all
except raw AAL connections.
The pool size must be a power of two between
4 and 8192 inclusive.
When attaching the driver allocates this number
of mbufs with clusters.
.It Va hw.hatm Ns Ar N Ns Va .rbpl0_thresh
Interrupt threshold for large receive buffer pool 0.
When the number of free
buffers in the pool falls below this threshold it generates an interrupt
so that the driver can refill the pool.
.It Va hw.hatm Ns Ar N Ns Va .rbrq0_size
Size of receive buffer return queue 0.
This queue is used to return buffers
filled with received frames to the driver.
The size must be a power of 2
between 1 and 16384 inclusive.
.It Va hw.hatm Ns Ar N Ns Va .rbrq0_thresh
Interrupt threshold for receive buffer return queue 0.
This threshold
should only be triggered in exceptional cases.
.It Va hw.hatm Ns Ar N Ns Va .rbrq0_tout
Interrupt timeout for receive buffer return queue 0.
An interrupt is generated
after this time if the queue is not empty.
The number is in internal card
ticks.
.It Va hw.hatm Ns Ar N Ns Va .rbrq0_pcnt
Packet count threshold for receive buffer return queue 0.
An interrupt
is generated if this number of packets is in the queue.
.It Va hw.hatm Ns Ar N Ns Va .rbps1_size
Size of the small receive buffer pool 1.
This pool is used for all
raw AAL connections.
The pool size must be a power of two between
4 and 8192 inclusive.
When attaching the driver allocates this number
of mbufs.
.It Va hw.hatm Ns Ar N Ns Va .rbps1_thresh
Interrupt threshold for small receive buffer pool 1.
When the number of free
buffers in the pool falls below this threshold it generates an interrupt
so that the driver can refill the pool.
.It Va hw.hatm Ns Ar N Ns Va .rbrq1_size
Size of receive buffer return queue 1.
This queue is used to return buffers
filled with received cells to the driver.
The size must be a power of 2
between 1 and 16384 inclusive.
.It Va hw.hatm Ns Ar N Ns Va .rbrq1_thresh
Interrupt threshold for receive buffer return queue 1.
This threshold
should only be triggered in exceptional cases.
.It Va hw.hatm Ns Ar N Ns Va .rbrq1_tout
Interrupt timeout for receive buffer return queue 1.
An interrupt is generated
after this time if the queue is not empty.
The number is in internal card
ticks.
.It Va hw.hatm Ns Ar N Ns Va .rbrq1_pcnt
Packet count threshold for receive buffer return queue 0.
An interrupt
is generated if this number of cells is in the queue.
.It Va hw.hatm Ns Ar N Ns Va .irq0_size
Size of interrupt queue 0.
This must be a number between 1 and 1023 inclusive.
.It Va hw.hatm Ns Ar N Ns Va .irq0_thresh
Interrupt retrigger threshold of interrupt queue 0.
A new interrupt is trigger
if the queue fill state reaches this threshold and the interrupt was no
served.
.It Va hw.hatm Ns Ar N Ns Va .tbrq0_size
Transmit buffer return queue 0 size.
This queue is used to feed back empty
buffers of transmitted frames back to the driver.
It must be a power of 2
between 1 and 4096 inclusive.
.It Va hw.hatm Ns Ar N Ns Va .tbrq0_thresh
Transmit buffer return queue 0 threshold.
An interrupt is generated if the
queue fill state reaches this point.
.It Va hw.hatm Ns Ar N Ns Va .tpdrq_size
Transmit descriptor ready queue size.
This queue is used by the driver
to feed transmit descriptors into the card.
The size must be a power of 2
between 1 and 16384 inclusive.
.It Va hw.hatm Ns Ar N Ns Va .tpdmax
Maximum number of active TPDs per connection.
This controls the maximum
number of outstanding packet chunks per connection and thus the maximum
delay packets can have because of queueing on the adapter.
If set to 0,
a connection can eat up all available TPDs.
.It Va hw.hatm Ns Ar N Ns Va .mbuf_max_pages
Maximum number of memory pages allocated to small external mbufs.
This must not be zero and not larger than 65536.
.El
.Sh DIAGNOSTICS
.Bd -literal
hatm0: <FORE HE> mem 0xd2600000-0xd26fffff irq 9 at device 15.0 on pci2
hatm0: ForeRunnerHE 622, Rev. D, S/N 2949834, MAC=00:20:48:2d:02:ca
.Ed
.Sh SEE ALSO
.Xr natm 4 ,
.Xr natmip 4 ,
.Xr utopia 4 ,
.Xr ifconfig 8 ,
.Xr route 8
.Sh AUTHORS
.An Harti Brandt Aq Mt harti@FreeBSD.org
.Sh CAVEATS
When putting a HE155 into a 64-bit 66MHz PCI slot the machine may hang.
This occurs very early in the POST so that even the display does not turn on.
The HE155 runs only in 33MHz slots (either 32 or 64-bit).
HE622 cards work just fine in 64-bit slots.
.Pp
The driver may not work with bounce buffer, because of
.Xr bus_dmamap_sync 9
missing the
.Fa offset
and
.Fa len
arguments the
.Nx
function has.